TY  - JOUR
  - A. Byrne, F. Crowe, N. Meloni, A. Tisserand, E. M. Popovici, W.P.Marnane
  - 2007
  - January
  - International Journal of High Performance Systems Architecture
  - SPA resistant Elliptic Curve Cryptosystem using Addition Chains
  - Published
  - Altmetric: 1 ()
  - cryptography; elliptic curves; addition chains; side channel attacks
  - 1
  - 2
  - 133
  - 142
  - There has been a lot of interest in recent years in the problems faced by cryptosystems due to side channel attacks. Algorithms for elliptic curve point scalar multiplication such as the double-and-add method are prone to such attacks. By making use of special addition chains, it is possible to implement a Simple Power Analysis (SPA) resistant cryptosystem. In this paper, a reconfigurable architecture for a cryptographic processor is presented. A SPA resistant algorithm for point multiplication is implemented and is shown to be faster than the double-and-add method. Post place and route results for the processor are given.
  - 10.1504/IJHPSA.2007.015399
DA  - 2007/01
ER  - 

@article{V1194762,
   = {A. Byrne,  F. Crowe and  N. Meloni,  A. Tisserand and  E. M. Popovici,  W.P.Marnane },
   = {2007},
   = {January},
   = {International Journal of High Performance Systems Architecture},
   = {SPA resistant Elliptic Curve Cryptosystem using Addition Chains},
   = {Published},
   = {Altmetric: 1 ()},
   = {cryptography; elliptic curves; addition chains; side channel attacks},
   = {1},
   = {2},
  pages = {133--142},
   = {{There has been a lot of interest in recent years in the problems faced by cryptosystems due to side channel attacks. Algorithms for elliptic curve point scalar multiplication such as the double-and-add method are prone to such attacks. By making use of special addition chains, it is possible to implement a Simple Power Analysis (SPA) resistant cryptosystem. In this paper, a reconfigurable architecture for a cryptographic processor is presented. A SPA resistant algorithm for point multiplication is implemented and is shown to be faster than the double-and-add method. Post place and route results for the processor are given.}},
   = {10.1504/IJHPSA.2007.015399},
  source = {IRIS}
}