An Efficient Power Estimation and Optimisation Design Flow of Digital Circuits

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TY  - CONF
  - R. Mehrotra, T. English, K.L. Man, E. Popovici, M. Schellekens
  - IEEE ISOCC
  - An Efficient Power Estimation and Optimisation Design Flow of Digital Circuits
  - 2008
  - Unknown
  - Published
  - 1
  - ()
DA  - 2008/NaN
ER  - 
@inproceedings{V248927470,
   = {R. Mehrotra,  T. English and  K.L. Man,  E. Popovici and  M. Schellekens },
   = {IEEE ISOCC},
   = {{An Efficient Power Estimation and Optimisation Design Flow of Digital Circuits}},
   = {2008},
   = {Unknown},
   = {Published},
   = {1},
   = {()},
  source = {IRIS}
}
AUTHORSR. Mehrotra, T. English, K.L. Man, E. Popovici, M. Schellekens
TITLEIEEE ISOCC
PUBLICATION_NAMEAn Efficient Power Estimation and Optimisation Design Flow of Digital Circuits
YEAR2008
MONTHUnknown
STATUSPublished
PEER_REVIEW1
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