IRIS publication 277991365
An FPGA implementation of a GF (< i> p) ALU for encryption processors
RIS format for Endnote and similar
TY - JOUR - Daly, Alan and Marnane, William and Kerins, Tim and Popovici, Emanuel - 2004 - January - Microprocessors and Microsystems - An FPGA implementation of a GF (< i> p) ALU for encryption processors - Validated - 28 - 5 - 253 - 260 DA - 2004/01 ER -
BIBTeX format for JabRef and similar
@article{V277991365, = {Daly, Alan and Marnane, William and Kerins, Tim and Popovici, Emanuel}, = {2004}, = {January}, = {Microprocessors and Microsystems}, = {An FPGA implementation of a GF (< i> p) ALU for encryption processors}, = {Validated}, = {28}, = {5}, pages = {253--260}, source = {IRIS} }
Data as stored in IRIS
AUTHORS | Daly, Alan and Marnane, William and Kerins, Tim and Popovici, Emanuel | ||
YEAR | 2004 | ||
MONTH | January | ||
JOURNAL | Microprocessors and Microsystems | ||
TITLE | An FPGA implementation of a GF (< i> p) ALU for encryption processors | ||
STATUS | Validated | ||
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VOLUME | 28 | ||
ISSUE | 5 | ||
START_PAGE | 253 | ||
END_PAGE | 260 | ||
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