An FPGA implementation of a GF (< i> p) ALU for encryption processors

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TY  - JOUR
  - Daly, Alan and Marnane, William and Kerins, Tim and Popovici, Emanuel
  - 2004
  - January
  - Microprocessors and Microsystems
  - An FPGA implementation of a GF (< i> p) ALU for encryption processors
  - Validated
  - 28
  - 5
  - 253
  - 260
DA  - 2004/01
ER  - 
@article{V277991365,
   = {Daly, Alan and Marnane, William and Kerins, Tim and Popovici, Emanuel},
   = {2004},
   = {January},
   = {Microprocessors and Microsystems},
   = {An FPGA implementation of a GF (< i> p) ALU for encryption processors},
   = {Validated},
   = {28},
   = {5},
  pages = {253--260},
  source = {IRIS}
}
AUTHORSDaly, Alan and Marnane, William and Kerins, Tim and Popovici, Emanuel
YEAR2004
MONTHJanuary
JOURNALMicroprocessors and Microsystems
TITLEAn FPGA implementation of a GF (< i> p) ALU for encryption processors
STATUSValidated
PEER_REVIEW
SEARCH_KEYWORD
VOLUME28
ISSUE5
START_PAGE253
END_PAGE260
ABSTRACT
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