IRIS publication 277991437
Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder
RIS format for Endnote and similar
TY - CONF - Chen, Jiaoyan and Vasudevan, Dilip and Popovici, Emanuel and Schellekens, Michel - Digital System Design (DSD), 2011 14th Euromicro Conference on - Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder - 2011 - January - Validated - () - 301 - 308 DA - 2011/01 ER -
BIBTeX format for JabRef and similar
@inproceedings{V277991437, = {Chen, Jiaoyan and Vasudevan, Dilip and Popovici, Emanuel and Schellekens, Michel}, = {Digital System Design (DSD), 2011 14th Euromicro Conference on}, = {{Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder}}, = {2011}, = {January}, = {Validated}, = {()}, pages = {301--308}, source = {IRIS} }
Data as stored in IRIS
AUTHORS | Chen, Jiaoyan and Vasudevan, Dilip and Popovici, Emanuel and Schellekens, Michel | ||
TITLE | Digital System Design (DSD), 2011 14th Euromicro Conference on | ||
PUBLICATION_NAME | Design of a Low Power, Sub-Threshold, Asynchronous Arithmetic Logic Unit Using a Bidirectional Adder | ||
YEAR | 2011 | ||
MONTH | January | ||
STATUS | Validated | ||
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START_PAGE | 301 | ||
END_PAGE | 308 | ||
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