IRIS publication 277991534
Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits
RIS format for Endnote and similar
TY - CONF - Amaricai, Alexandru and Nimara, Sergiu and Boncalo, Oana and Chen, Jiaoyan and Popovici, Emanuel - Digital System Design (DSD), 2014 17th Euromicro Conference on - Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits - 2014 - January - Validated - 0 - () - 473 - 479 DA - 2014/01 ER -
BIBTeX format for JabRef and similar
@inproceedings{V277991534, = {Amaricai, Alexandru and Nimara, Sergiu and Boncalo, Oana and Chen, Jiaoyan and Popovici, Emanuel}, = {Digital System Design (DSD), 2014 17th Euromicro Conference on}, = {{Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits}}, = {2014}, = {January}, = {Validated}, = {0}, = {()}, pages = {473--479}, source = {IRIS} }
Data as stored in IRIS
AUTHORS | Amaricai, Alexandru and Nimara, Sergiu and Boncalo, Oana and Chen, Jiaoyan and Popovici, Emanuel | ||
TITLE | Digital System Design (DSD), 2014 17th Euromicro Conference on | ||
PUBLICATION_NAME | Probabilistic Gate Level Fault Modeling for Near and Sub-Threshold CMOS Circuits | ||
YEAR | 2014 | ||
MONTH | January | ||
STATUS | Validated | ||
PEER_REVIEW | 0 | ||
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START_PAGE | 473 | ||
END_PAGE | 479 | ||
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