IRIS publication 103228176
Pattern Compensation in SOA-Based Gates
RIS format for Endnote and similar
TY - JOUR - Webb, R.P., Dailey, J.M., Manning, R.J. - 2010 - Unknown - Optics Express - Pattern Compensation in SOA-Based Gates - Published - () - 18 - 13 - 13502 - 13509 - We propose a novel scheme employing complementary data inputs to overcome the patterning normally associated with semiconductor optical amplifier based gates and demonstrate the scheme experimentally at 42.6Gb/s. The scheme not only avoids introducing patterning during switching, but also compensates for much of the patterning present on theinput data. A novel gate was developed for the experiment to provide the complementary signals required for the scheme. DA - 2010/NaN ER -
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@article{V103228176, = {Webb, R.P. and Dailey, J.M. and Manning, R.J. }, = {2010}, = {Unknown}, = {Optics Express}, = {Pattern Compensation in SOA-Based Gates}, = {Published}, = {()}, = {18}, = {13}, pages = {13502--13509}, = {{We propose a novel scheme employing complementary data inputs to overcome the patterning normally associated with semiconductor optical amplifier based gates and demonstrate the scheme experimentally at 42.6Gb/s. The scheme not only avoids introducing patterning during switching, but also compensates for much of the patterning present on theinput data. A novel gate was developed for the experiment to provide the complementary signals required for the scheme.}}, source = {IRIS} }
Data as stored in IRIS
AUTHORS | Webb, R.P., Dailey, J.M., Manning, R.J. | ||
YEAR | 2010 | ||
MONTH | Unknown | ||
JOURNAL_CODE | Optics Express | ||
TITLE | Pattern Compensation in SOA-Based Gates | ||
STATUS | Published | ||
TIMES_CITED | () | ||
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VOLUME | 18 | ||
ISSUE | 13 | ||
START_PAGE | 13502 | ||
END_PAGE | 13509 | ||
ABSTRACT | We propose a novel scheme employing complementary data inputs to overcome the patterning normally associated with semiconductor optical amplifier based gates and demonstrate the scheme experimentally at 42.6Gb/s. The scheme not only avoids introducing patterning during switching, but also compensates for much of the patterning present on theinput data. A novel gate was developed for the experiment to provide the complementary signals required for the scheme. | ||
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